Cadence – Hiring for Intern – CST @BANGALORE

About Company

At Cadence, we are in the business of hiring and nurturing the next generation of innovators and tech leaders. If you are passionate about making a tangible impact on the global technology landscape, this is where you start.

Job Details

Job Description

At Cadence, we are in the business of hiring and nurturing the next generation of innovators and tech leaders. If you are passionate about making a tangible impact on the global technology landscape, this is where you start.

Requirements

• Education: You should hold (or be pursuing) a B.E./B.Tech or M.E./M.Tech in Electronics Engineering or a closely related field.
• Tool Proficiency: A solid working knowledge of the Cadence Virtuoso tool suite is essential, including Schematic, Layout, and Analog Design Environment (ADE).
• Technical Knowledge: Familiarity with both analog and digital design flows. You should understand simulation, layout, and physical verification processes like DRC, LVS, and RC Extraction.
• Custom Design: Having a basic grasp of foundry PDKs (Process Design Kits) and Custom Analog Design Methodology is a major advantage.
• Programming/Scripting: Proficiency in at least one language such as SKILL (Cadence’s proprietary language), Python, CShell, Perl, or TCL.
• Systems & Environment: * You must be comfortable working in a Linux environment.
  • Exposure to compute-server grid systems and load-balancing tools (like LSF, SGE, or Slurm) is highly valued.
• Soft Skills: Strong communication, interpersonal skills, and a natural ability to work within a team.

Roles and Responsibilities

• Education: You should hold (or be pursuing) a B.E./B.Tech or M.E./M.Tech in Electronics Engineering or a closely related field.
• Tool Proficiency: A solid working knowledge of the Cadence Virtuoso tool suite is essential, including Schematic, Layout, and Analog Design Environment (ADE).
• Technical Knowledge: Familiarity with both analog and digital design flows. You should understand simulation, layout, and physical verification processes like DRC, LVS, and RC Extraction.
• Custom Design: Having a basic grasp of foundry PDKs (Process Design Kits) and Custom Analog Design Methodology is a major advantage.
• Programming/Scripting: Proficiency in at least one language such as SKILL (Cadence’s proprietary language), Python, CShell, Perl, or TCL.
• Systems & Environment: * You must be comfortable working in a Linux environment.
  • Exposure to compute-server grid systems and load-balancing tools (like LSF, SGE, or Slurm) is highly valued.
• Soft Skills: Strong communication, interpersonal skills, and a natural ability to work within a team.

How to Apply?

Role Summary

The Intern – CST (Customer Support Technical) role at Cadence is effectively a “Bridge Engineer” position. While many interns focus solely on internal R&D, a CST intern learns how the world’s biggest semiconductor companies actually use Cadence tools to build chips. You will be deep-diving into the Virtuoso ecosystem, troubleshooting complex design problems, and possibly automating workflows using SKILL scripting. It’s less about “building a feature” and more about “mastering the entire design flow.”

Company Culture & Insights

Cadence is one of the “Big Three” in the EDA (Electronic Design Automation) world. The culture is academic yet professional—think of it as a high-end engineering lab. In the Bangalore office, you’ll find a dense concentration of VLSI experts. They value precision over speed; in the chip world, a single mistake can cost millions of dollars in “tape-out” fees, so the “Cadence Way” involves rigorous verification and methodical problem-solving..

Why We Recommend This Job

• The Virtuoso Gold Standard: Virtuoso is the industry standard for analog design. Mastering it makes you instantly employable at any major semiconductor firm (Intel, Nvidia, Qualcomm, etc.).
• Niche Skill Acquisition: Learning SKILL scripting is a “superpower” in this industry. Very few entry-level engineers know it well, and it’s critical for automating custom layouts.
• Linux/Grid Mastery: Most universities don’t teach you how to work on massive server grids (LSF/Slurm). This internship gives you “industrial-strength” IT skills.

Career Growth Potential

Cadence has a very high “intern-to-full-time” conversion rate for their CST and AAE (Associate Application Engineer) roles. From here, you can grow into an Application Engineer, Design Engineer, or even move into Technical Marketing. Because you see so many different customer use cases, you often end up with a broader perspective of the semiconductor industry than a pure R&D engineer.

Skills You’ll Gain

• Physical Verification: Mastery of DRC (Design Rule Check) and LVS (Layout vs. Schematic) which are the “final exams” of chip design.
• EDA Scripting: The ability to use Python and TCL to automate tedious design tasks.
• PDK Integration: Understanding how to bridge the gap between foundry requirements (TSMC, Samsung, etc.) and the design software.

Salary & Benefits Info

• Stipend: For a top-tier EDA company in Bangalore, intern stipends usually range from ₹35,000 to ₹60,000 per month, depending on whether you are a B.Tech or M.Tech student.
• Perks: Cadence offers excellent office facilities, structured mentorship programs, and a “foot in the door” to the highly lucrative semiconductor industry.